I write the software and build the hardware it runs on.
Web platforms, AI tools and developer products, written in TypeScript and deployed on Vercel.
AI-Assisted Tournament Tabulation, Pairing Engine & Live Matrix
A high-precision British Parliamentary debate tournament management system. Delivers sub-second power-pairings, zero institutional clash verification, live WebSocket tab room synchronization, and digital ballot adjudication.
Campus AI Calculator Web Experience, Store & In-Browser Emulator
The official production web platform and hardware store for calcOS—the modified Casio scientific calculator with integrated campus AI. Features an interactive in-browser emulator, tactile hardware showcase, and streamlined order checkout.
Speaker Management, Fluency Telemetry & Public Speaking Platform
The operational command suite and international presence for the Global Orators initiative. Powers speaker onboarding, rehearsal scheduling, fluency tracking, and speech curriculum distribution across competitive tracks.
Football Tips, Live Fixtures & Subscription Billing
A football predictions platform with live fixtures, league standings, a sports news feed and tiered VIP tip subscriptions billed in Kenyan shillings, managed from an admin dashboard.
Daily Goals-Market Predictions & VIP Plans
A focused football tips site for the Over 2.5 and Over 3.5 goals markets: daily free picks, VIP plans in KES (1, 2 and 4 weeks), and an archive of past tips.
Exam Schedules, Personal Timetables & AI Quick Revision
An exam timetable portal for nine Kenyan universities, including UoN, JKUAT, KU and DeKUT. Students add their unit codes to get a personal exam schedule, then open Quick Revision for AI-generated flashcards, quizzes and notes on each unit.
13 apps · blue = web · tangerine = AI · dot = flagship
calcOS runs on both sides: as a web platform and in-browser emulator, and inside a modified Casio fx-991ES Plus.
Firmware in C/C++ for RP2040 and ESP32, and the sensors, motors and boards it drives, built at the bench.
Dual-Core RP2040 Microcontroller & ESP32 Telemetry Station
An integrated edge verification terminal designed for institutional attendance records. Features hardware interrupt-driven RC522 card scanning on a Raspberry Pi Pico W, synchronized over SPI and UART to an ESP32 telemetry server with an interactive web dashboard.
Hardware-Hacked Scientific Calculator with AI Prompting & Discrete Micro-OLED
A deep hardware modification of the Casio fx-991ES PLUS scientific calculator. Integrates a custom Wi-Fi co-processor concealed behind the solar cell bezel, retrofits a secondary discrete micro-OLED screen, and runs custom calcOS firmware featuring CalcoChat (AI math & physics assistant) and CalcoPlay media playback.
8 parts · tap any part to inspect
Development Environment, Cross-Compilers & Microcontroller Architectures
Configured toolchains for ARM Cortex-M microcontrollers. Set up GCC, GDB, OpenOCD, and initialized the bare-metal development pipeline.
Direct Memory Manipulation, Struct Alignment & Bitfields
Analyzed memory layouts, padding, and alignment in embedded C. Implemented geometric algorithms validating pointer arithmetic and register structures.
Hardware Timers, External Interrupts & Switch Debouncing
Programmed GPIO registers directly. Built debouncing state machines using timer interrupts without blocking CPU execution cycles.
Circular Ring Buffers & UART Packet Framing
Engineered circular buffers for UART serial communications with frame delimiters and checksum verification.
ADC Calibration, DMA Channels & Voltage Sampling
Configured ADC channels for continuous sensor voltage acquisition using Direct Memory Access (DMA) to minimize core utilization.
Bus Arbitration, Slave Addressing & Sensor Acquisition
Interfaced MPU6050 and OLED display peripherals over I2C and SPI buses. Solved bus collision and clock-stretching constraints.
ESP32 WiFi Networking & REST Webhook Sync
Implemented asynchronous socket communication on the ESP32. Engineered a local web server to dispatch sensor telemetry to remote cloud endpoints.
MIFARE Classic 1K Cards, RC522 Reader & Authentication
Implemented SPI driver communication with the RC522 RFID reader. Handled block authentication and encrypted Sector 1 memory storage.
Final Production Assembly, Dual-Core Synchronization & Enclosure
Completed full system integration: Raspberry Pi Pico W reading student badges, transmitting to ESP32 telemetry gateway, and rendering live confirmation on an animated display.
I mentor secondary school teams through the whole engineering cycle: turning a real-world problem into a schematic, teaching embedded C/C++ from first principles, tuning motor PID loops, and coaching them to defend their methodology before national judges.
Young Scientists Kenya National Science Exhibition: Kassim Musa Abass standing with mentored student researchers on the exhibition presentation floor.
Hardware debugging session: students diagnosing motor driver signals, ultrasonic sensor alignment, and firmware logic directly on the lab bench.
Hands-on instruction: guiding secondary school competitors through power distribution bus wiring and sensor calibration.
Component-level assembly: H-bridge driver heat-sinking, microcontroller GPIO routing, and logic isolation.
Networks in the field are fundamentally erratic. Whether handling asynchronous payment webhooks or microsecond telemetry streams, systems must never presume remote availability. Distributed architectures are engineered with local failover buffers and idempotency keys on the server so that dropped packets simply trigger deterministic retries without corrupting data or state.
On low-power microcontrollers like the RP2040, blocking operations are fatal to sensor responsiveness. By offloading RF SPI card polling to Core 0 and handling asynchronous WiFi socket serialization on Core 1 (or delegating to an ESP32 UART bridge), hardware loops remain bounded within strict sub-50ms deadlines.
Web interfaces should load with the immediacy of printed paper. Utilizing static page compilation, streaming server components, and Tailwind CSS v4 eliminates bloated client runtime payloads. Every production site deployed to Vercel is tuned for instant first contentful paint.
From deterministic cryptographic validation across distributed community ledgers to MIFARE 1K Sector authentication in RFID card readers, identity and record data must be verified mathematically rather than assumed via trusting endpoints.
Systems architecture, backend pipelines, custom firmware, full-stack builds.
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